[1]江政,周勇,陈雪美,等.基于FPGA的电能质量监测装置设计[J].郑州大学学报(工学版),2016,37(02):29-32.[doi:10.3969/j.issn.1671-6833.201505040]
　Jiang Zheng,Zhou Yong,Chen Xuemei,et al.Design of a Power Quality Monitoring Device Based on FPGA[J].Journal of Zhengzhou University (Engineering Science),2016,37(02):29-32.[doi:10.3969/j.issn.1671-6833.201505040]
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基于FPGA的电能质量监测装置设计()
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《郑州大学学报(工学版)》[ISSN:1671-6833/CN:41-1339/T]

卷:
37
期数:
2016年02期
页码:
29-32
栏目:
出版日期:
2016-04-18

文章信息/Info

Title:
Design of a Power Quality Monitoring Device Based on FPGA
作者:
江政; 周勇; 陈雪美; 吕娜伟
郑州大学电气工程学院,河南郑州,450001
Author(s):
Jiang Zheng;  Zhou Yong;  Chen Xuemei;  Lu Nawei
School of Electrical Engineering, Zhengzhou University, Zhengzhou, Henan 450001
关键词:
Keywords:
DOI:
10.3969/j.issn.1671-6833.201505040
文献标志码:
A
摘要:
为了提高电能质量监测的精度和速度,设计了以FPGA为处理控制核心的监测装置.硬件部分主要包括信号采集单元、通信单元、电源单元等.软件方面,在FPGA上定制了NIOS Ⅱ的嵌入式核心,优化了数据并行处理流程,在FPGA芯片内构建锁相倍频模块和FFT谐波分析算法模块,实现了对电能质量数据的同步采样和分析.测试表明,装置具有响应速度快、测量精度高和实时性能好的特点,符合国家关于电能质量监测的标准.
Abstract:
In order to improve the accuracy and speed of power quality monitoring, a monitoring device with FPGA as the core of processing and control is designed. The hardware part mainly includes signal acquisition unit, communication unit, power supply unit, etc. In terms of software, the embedded NIOS Ⅱ is customized on the FPGA. The core optimizes the data parallel processing process, builds a phase-locked frequency multiplication module and an FFT harmonic analysis algorithm module in the FPGA chip, and realizes synchronous sampling and analysis of power quality data. The test shows that the device has fast response speed and high measurement accuracy. High performance and good real-time performance, in line with national standards on power quality monitoring.

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